Self-Organising Digital Circuits

Abstract: Fault tolerance in classical computing has traditionally relied on static strategies like hardware redundancy and error-correcting codes. Biological systems, in contrast, exhibit adaptive plasticity, maintaining function through dynamic re-organisation around damage.

摘要： 传统计算中的容错技术通常依赖于硬件冗余和纠错码等静态策略。相比之下，生物系统表现出适应性可塑性，通过围绕损伤进行动态重组来维持功能。

Inspired by this principle, we introduce Self-Organising Digital Circuits, framing functional logic generation and maintenance as a meta-learning problem on graphs. Our architecture employs a topology-masked Transformer that configures the Lookup Tables (LUT) of a circuit’s Boolean gates.

受此原理启发，我们引入了“自组织数字电路”（Self-Organising Digital Circuits），将功能逻辑的生成与维护构建为图上的元学习问题。我们的架构采用了一种拓扑掩码 Transformer，用于配置电路布尔门的查找表（LUT）。

Extending the pattern-generation paradigm of Neural Cellular Automata (NCA), it navigates the degenerate Boolean search space to satisfy a computational task, rather than regenerating a fixed target state. We demonstrate that it can self-assemble functional circuits from scratch and rapidly re-route logic around permanent, previously unseen hardware faults.

该研究扩展了神经元胞自动机（NCA）的模式生成范式，通过在退化的布尔搜索空间中导航以满足计算任务，而非仅仅重新生成固定的目标状态。我们证明了该系统能够从零开始自组装功能电路，并能针对此前未见的永久性硬件故障快速重路由逻辑。

For soft errors, the policy achieves near-perfect recovery (>99.99% accuracy) from damage sizes far exceeding training conditions. We further observe generalisation across circuit scales: accuracy improves on graphs substantially wider than those seen during training. This work bridges the principles of biological self-organisation with the practical domain of digital hardware.

对于软错误，该策略在损伤程度远超训练条件的情况下，实现了近乎完美的恢复（准确率 >99.99%）。我们还观察到了跨电路规模的泛化能力：在比训练时规模大得多的图上，准确率反而有所提升。这项工作将生物自组织原理与数字硬件的实际应用领域架起了桥梁。